From 952b64575613d26163a5afa5ff8bfdb57840091b Mon Sep 17 00:00:00 2001 From: Alexander Couzens Date: Mon, 15 Aug 2022 15:00:14 +0200 Subject: [PATCH 08/10] net: mtk_sgmii: set the speed according to the phy interface in AN The non auto-negotioting code path is setting the correct speed for the interface. Ensure auto-negotiation code path is doing it as well. Signed-off-by: Alexander Couzens --- drivers/net/ethernet/mediatek/mtk_sgmii.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c @@ -21,13 +21,20 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st } /* For SGMII interface mode */ -static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs) +static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs, phy_interface_t interface) { unsigned int val; /* PHYA power down */ regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, SGMII_PHYA_PWD); + /* Set SGMII phy speed */ + regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val); + val &= ~RG_PHY_SPEED_MASK; + if (interface == PHY_INTERFACE_MODE_2500BASEX) + val |= RG_PHY_SPEED_3_125G; + regmap_write(mpcs->regmap, mpcs->ana_rgc3, val); + /* Setup the link timer and QPHY power up inside SGMIISYS */ regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER, SGMII_LINK_TIMER_DEFAULT); @@ -100,7 +107,7 @@ static int mtk_pcs_config(struct phylink if (interface != PHY_INTERFACE_MODE_SGMII) err = mtk_pcs_setup_mode_force(mpcs, interface); else if (phylink_autoneg_inband(mode)) - err = mtk_pcs_setup_mode_an(mpcs); + err = mtk_pcs_setup_mode_an(mpcs, interface); return err; }