From patchwork Sat Sep 17 20:26:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 12979244 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Date: Sat, 17 Sep 2022 21:26:55 +0100 From: Daniel Golle To: linux-wireless@vger.kernel.org, Stanislaw Gruszka , Helmut Schaa Cc: Kalle Valo , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Johannes Berg Subject: [PATCH v3 03/16] rt2x00: add support for external PA on MT7620 Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Implement support for external PA connected to MT7620A. Signed-off-by: Tomislav Požega [pozega.tomislav@gmail.com: use chanreg and dccal helpers.] Signed-off-by: Daniel Golle Acked-by: Stanislaw Gruszka --- drivers/net/wireless/ralink/rt2x00/rt2800.h | 1 + .../net/wireless/ralink/rt2x00/rt2800lib.c | 52 ++++++++++++++++++- 2 files changed, 52 insertions(+), 1 deletion(-) --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h @@ -2739,6 +2739,7 @@ enum rt2800_eeprom_word { #define EEPROM_NIC_CONF2_RX_STREAM FIELD16(0x000f) #define EEPROM_NIC_CONF2_TX_STREAM FIELD16(0x00f0) #define EEPROM_NIC_CONF2_CRYSTAL FIELD16(0x0600) +#define EEPROM_NIC_CONF2_EXTERNAL_PA FIELD16(0x8000) /* * EEPROM LNA --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c @@ -4368,6 +4368,43 @@ static void rt2800_config_channel(struct rt2800_iq_calibrate(rt2x00dev, rf->channel); } + if (rt2x00_rt(rt2x00dev, RT6352)) { + if (test_bit(CAPABILITY_EXTERNAL_PA_TX0, + &rt2x00dev->cap_flags)) { + reg = rt2800_register_read(rt2x00dev, RF_CONTROL3); + reg |= 0x00000101; + rt2800_register_write(rt2x00dev, RF_CONTROL3, reg); + + reg = rt2800_register_read(rt2x00dev, RF_BYPASS3); + reg |= 0x00000101; + rt2800_register_write(rt2x00dev, RF_BYPASS3, reg); + + rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73); + rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73); + rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73); + rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27); + rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8); + rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4); + rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05); + rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27); + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8); + rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4); + rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05); + rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27); + rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8); + rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4); + rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05); + rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00); + + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, + 0x36303636); + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, + 0x6C6C6B6C); + rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, + 0x6C6C6B6C); + } + } + bbp = rt2800_bbp_read(rt2x00dev, 4); rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf)); rt2800_bbp_write(rt2x00dev, 4, bbp); @@ -9566,7 +9603,8 @@ static int rt2800_init_eeprom(struct rt2 */ eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1); - if (rt2x00_rt(rt2x00dev, RT3352)) { + if (rt2x00_rt(rt2x00dev, RT3352) || + rt2x00_rt(rt2x00dev, RT6352)) { if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352)) __set_bit(CAPABILITY_EXTERNAL_PA_TX0, @@ -9577,6 +9615,18 @@ static int rt2800_init_eeprom(struct rt2 &rt2x00dev->cap_flags); } + eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2); + + if (rt2x00_rt(rt2x00dev, RT6352) && eeprom != 0 && eeprom != 0xffff) { + if (!rt2x00_get_field16(eeprom, + EEPROM_NIC_CONF2_EXTERNAL_PA)) { + __clear_bit(CAPABILITY_EXTERNAL_PA_TX0, + &rt2x00dev->cap_flags); + __clear_bit(CAPABILITY_EXTERNAL_PA_TX1, + &rt2x00dev->cap_flags); + } + } + return 0; }